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Formation Distributed and Multi-Core Systems & Software : formation Mobilité, temps réel et embarqué avec Orsys
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Distributed and Multi-Core Systems & Software



The primary goal of this course is to give the participant the skills necessary to design software for real-time and embedded multiprocessing systems that will operate in distributed and/or multicore processing configurations.

» Participants

Architects, project managers and technical consultants who have to design and implement real-time and embedded systems in distributed and/or multicore processing configurations.

» Pre-requisites

Course participants are expected to have background in embedded and real-time software design for single-CPU systems.

» Pedagogic Methods

This is a very practical, results-oriented course that will provide knowledge and skills that can be applied immediately.
   
 

PROGRAM

» Definitions and Background

Distributed Systems.

Multi-Core Systems-on-a-Chip ("SoC").

Basic concepts associated with distributed systems and multi-core SoC.

Differences: Multi-Core vs. Distributed.


» Distributed Control Design

Loosely-Coupled Distributed Systems.

Distributing a Control Capability.

System Partitioning Guidelines.

Exercise
On-Board Automotive Networks. Body Electronics Control for Airport Train.


» Designing Complex Distributed Systems

Identifying Sub-systems: Sub-system Structuring Criteria.

Distributed Applications: Logical vs. Physical Nodes.

Design Models for Distributed Applications.

Decomposition of Sub-systems into Software Tasks (Optional).

Message Communication Performance Modeling (Optional).

Exercise
Multiprocessing System Performance Calculations. High-Performance IP Communication Router Design.


» Multi-Core Systems-on-a-Chip (SoC's)

The use of multi-core SoC's in embedded systems designs.

Amdahl's Law.

Fine-Grained vs. Coarse-Grained Parallelism.

Symmetric vs. Asymmetric Multiprocessing. Principles.

Operating Systems for Embedded Multiprocessing.


» Symmetric Multiprocessing ("SMP")

Organizing Software for SMP.

Operating Systems Support for SMP.

Spinlocks.

Load Balancing vs. Processor Affinity.

Extended Example: VxWorks RTOS for SMP.

Hidden Dangers in Designing Software for SMP.

OpenMP and MPI.

Read-Write Locks. Lock-Free Programming.

Design Patterns for SMP MultiCore Software.


» Asymmetric Multiprocessing ("AMP")

When to Use AMP.

Operating Systems for AMP.

Moving from Uni-Processing to AMP.

Hypervisors.

Design Patterns for AMP Multicore Software.


» Memory Issues in MultiCore Software

Working with Cache Memory.

Memory Contention.

"False Sharing".

Memory Consistency and Inconsistency.

Memory Barriers for MultiCore Software.

 
     
 
     
   
  Formation Software for real-time  
 
Stage pratique - DIF
Réf :  MUL
Prix 2012 : Nous consulter
Durée : 2  jours
 
     
         
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  Prochaines sessions: Nous consulter


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